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» The Price of Routing in FPGAs
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DAC
2005
ACM
14 years 8 months ago
Logic block clustering of large designs for channel-width constrained FPGAs
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
Marvin Tom, Guy G. Lemieux
FPL
2005
Springer
98views Hardware» more  FPL 2005»
14 years 1 months ago
A Verilog RTL Synthesis Tool for Heterogeneous FPGAs
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
Peter Jamieson, Jonathan Rose
FPL
2009
Springer
99views Hardware» more  FPL 2009»
14 years 5 days ago
Exploiting fast carry-chains of FPGAs for designing compressor trees
Fast carry chains featuring dedicated adder circuitry is a distinctive feature of modern FPGAs. The carry chains bypass the general routing network and are embedded in the logic b...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
VLSID
2005
IEEE
128views VLSI» more  VLSID 2005»
14 years 8 months ago
On-Line Synthesis for Partially Reconfigurable FPGAs
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
Renqiu Huang, Ranga Vemuri
FPL
1997
Springer
75views Hardware» more  FPL 1997»
13 years 11 months ago
Thermal monitoring on FPGAs using ring-oscillators
In this paper, a temperature-to-frequency transducer suitable for thermal monitoring on FPGAs is presented. The dependence between delay and temperature is used to produce a freque...
Eduardo I. Boemo, Sergio López-Buedo