: Data distribution is one of the key aspects that a parallelizing compiler for a distributed memory architecture should consider, in order to get efficiency from the system. The ...
Traditionally, clock network layout is performed after cell placement. Such methodology is facing a serious problem in nanometer IC designs where people tend to use huge clock buff...
We participated in one task of TRECVID 2008, that is, the high-level feature extraction (HLFE). This paper presents our approaches and results on the HLFE task. We mainly focus on...
Yuxin Peng, Zhiguo Yang, Jian Yi, Lei Cao, Hao Li,...
In this paper we show cache-friendly implementations of the Floyd-Warshall algorithm for the All-Pairs ShortestPath problem. We first compare the best commercial compiler optimiza...
Abstract. The Parallel Disks Model (PDM) has been proposed to alleviate the I/O bottleneck that arises in the processing of massive data sets. Sorting has been extensively studied ...