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» The SAGE graphics architecture
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WWW
2007
ACM
14 years 10 months ago
A framework for rapid integration of presentation components
The development of user interfaces (UIs) is one of the most timeconsuming aspects in software development. In this context, the lack of proper reuse mechanisms for UIs is increasi...
Boualem Benatallah, Fabio Casati, Florian Daniel, ...
LCTRTS
2009
Springer
14 years 4 months ago
Synergistic execution of stream programs on multicores with accelerators
The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. The StreamIt graphs describe task, da...
Abhishek Udupa, R. Govindarajan, Matthew J. Thazhu...
PDCAT
2009
Springer
14 years 4 months ago
CheCUDA: A Checkpoint/Restart Tool for CUDA Applications
Abstract—In this paper, a tool named CheCUDA is designed to checkpoint CUDA applications that use GPUs as accelerators. As existing checkpoint/restart implementations do not supp...
Hiroyuki Takizawa, Katsuto Sato, Kazuhiko Komatsu,...
CF
2009
ACM
14 years 4 months ago
Accelerating total variation regularization for matrix-valued images on GPUs
The advent of new matrix-valued magnetic resonance imaging modalities such as Diffusion Tensor Imaging (DTI) requires extensive computational acceleration. Computational accelera...
Maryam Moazeni, Alex A. T. Bui, Majid Sarrafzadeh
IEEEPACT
2008
IEEE
14 years 4 months ago
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aa...