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TCSV
2008
225views more  TCSV 2008»
13 years 10 months ago
Analysis and Efficient Architecture Design for VC-1 Overlap Smoothing and In-Loop Deblocking Filter
Abstract--In contrast to the macroblock-based in-loop deblocking filters, the filters of VC-1 perform all horizontal edges (for in-loop filtering) or vertical edges (for overlap sm...
Yen-Lin Lee, T. Q. Nguyen
TPDS
2010
174views more  TPDS 2010»
13 years 8 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
CASES
2006
ACM
14 years 4 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
SAC
2006
ACM
14 years 4 months ago
On the architectural alignment of ATL and QVT
Transforming models is a critical activity in Model Driven Engineering (MDE). With the expected adoption of the OMG QVT standard for model transformation language it is anticipate...
Frédéric Jouault, Ivan Kurtev
EGC
2005
Springer
14 years 3 months ago
A Grid Architecture for Comfortable Robot Control
This paper describes a research project about robot control across a computing Grid, first step toward a Grid solution for generic process control. A computational Grid can signi...
Stéphane Vialle, Amelia De Vivo, Fabrice Sa...