4 search results - page 1 / 1 » The Scalable Tree Protocol - A Cache Coherence Approach for ... |
SPDP
1992
IEEE
13 years 11 months ago
1992
IEEE
DSN
2011
IEEE
12 years 7 months ago
2011
IEEE
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Realizing scalable cache coherence in the many-core era comes with a whole new set of constraints and opportunities. It is widely believed that multi-hop, unordered on-chip networ...
MAM
2002
13 years 7 months ago
2002
Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines t...