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» The Simple Reachability Problem in Switch Graphs
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CSL
2009
Springer
14 years 4 months ago
Model Checking FO(R) over One-Counter Processes and beyond
Abstract. One-counter processes are pushdown processes over a singleton stack alphabet (plus a stack-bottom symbol). We study the problems of model checking asynchronous products o...
Anthony Widjaja To
COCOON
2001
Springer
14 years 2 months ago
A Space Saving Trick for Directed Dynamic Transitive Closure and Shortest Path Algorithms
We present a simple space saving trick that applies to many previous algorithms for transitive closure and shortest paths in dynamic directed graphs. In these problems, an update c...
Valerie King, Mikkel Thorup
CN
2006
70views more  CN 2006»
13 years 9 months ago
Preventing persistent oscillations and loops in IBGP configuration with route reflection
Abstract-- Internal Border Gateway Protocol (IBGP) is responsible for distributing external reachability information, obtained via External-BGP (EBGP) sessions, within an autonomou...
Anuj Rawat, Mark A. Shayman
FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
14 years 6 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson