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» The design of a high performance low power microprocessor
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DAC
2003
ACM
14 years 9 months ago
Pushing ASIC performance in a power envelope
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
Ruchir Puri, Leon Stok, John M. Cohn, David S. Kun...
APCCAS
2006
IEEE
373views Hardware» more  APCCAS 2006»
14 years 15 days ago
A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs
A new low offset dynamic comparator for high resolution high speed analog-to-digital application has been designed. Inputs are reconfigured from the typical differential pair compa...
Vipul Katyal, Randall L. Geiger, Degang Chen
TC
2008
13 years 8 months ago
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
CSREAESA
2004
13 years 10 months ago
A High Performance, Low Area Overhead Carry Lookahead Adder
Adders are some of the most critical data path circuits requiring considerable design effort in order to "squeeze" out as much performance gain as possible. Many adder d...
James Levy, Jabulani Nyathi
IPSN
2005
Springer
14 years 2 months ago
Perpetual environmentally powered sensor networks
— Environmental energy is an attractive power source for low power wireless sensor networks. We present Prometheus, a system that intelligently manages energy transfer for perpet...
Xiaofan Jiang, Joseph Polastre, David E. Culler