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» The design of the IPACS distributed software architecture
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HPCA
2012
IEEE
12 years 3 months ago
System-level implications of disaggregated memory
Recent research on memory disaggregation introduces a new architectural building block—the memory blade—as a cost-effective approach for memory capacity expansion and sharing ...
Kevin T. Lim, Yoshio Turner, Jose Renato Santos, A...
PPOPP
2010
ACM
14 years 2 months ago
Load balancing on speed
To fully exploit multicore processors, applications are expected to provide a large degree of thread-level parallelism. While adequate for low core counts and their typical worklo...
Steven Hofmeyr, Costin Iancu, Filip Blagojevic
CASES
2009
ACM
14 years 2 months ago
A buffer replacement algorithm exploiting multi-chip parallelism in solid state disks
Solid State Disks (SSDs) are superior to magnetic disks from a performance point of view due to the favorable features of NAND flash memory. Furthermore, thanks to improvement on...
Jinho Seol, Hyotaek Shim, Jaegeuk Kim, Seungryoul ...
CASES
2009
ACM
14 years 2 months ago
Tight WCRT analysis of synchronous C programs
Accurate estimation of the tick length of a synchronous program is essential for efficient and predictable implementations that are devoid of timing faults. The techniques to dete...
Partha S. Roop, Sidharta Andalam, Reinhard von Han...
SIGCOMM
2009
ACM
14 years 2 months ago
Why should we integrate services, servers, and networking in a data center?
Since the early days of networks, a basic principle has been that endpoints treat the network as a black box. An endpoint injects a packet with a destination address and the netwo...
Paolo Costa, Thomas Zahn, Antony I. T. Rowstron, G...