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DSN
2011
IEEE
12 years 9 months ago
Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
Shuchang Shan, Yu Hu, Xiaowei Li
IEEEARES
2009
IEEE
14 years 4 months ago
Capturing Information Flow with Concatenated Dynamic Taint Analysis
Dynamic taint analysis (DTA) is a technique used for tracking information flow by propagating taint propagation across memory locations during program execution. Most implementat...
Hyung Chan Kim, Angelos D. Keromytis, Michael Covi...
RSP
2007
IEEE
143views Control Systems» more  RSP 2007»
14 years 4 months ago
Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs
Multiprocessor Systems-on-Chip (MPSoCs) is a trend in VLSI design, since they minimize the “design crisis” (gap between silicon technology and actual SoC design capacity) and ...
Ewerson Carvalho, Ney Calazans, Fernando Moraes
SPAA
2005
ACM
14 years 3 months ago
Dynamic page migration with stochastic requests
The page migration problem is one of subproblems of data management in networks. It occurs in a distributed network of processors sharing one indivisible memory page of size D. Du...
Marcin Bienkowski
LCPC
2000
Springer
14 years 1 months ago
Efficient Dynamic Local Enumeration for HPF
In translating HPF programs, a compiler has to generate local iteration and communication sets. Apart from local enumeration, local storage compression is an issue, because in HPF ...
Will Denissen, Henk J. Sips