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ISCA
2012
IEEE
333views Hardware» more  ISCA 2012»
12 years 1 months ago
Reducing memory reference energy with opportunistic virtual caching
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
Arkaprava Basu, Mark D. Hill, Michael M. Swift
ICASSP
2009
IEEE
14 years 6 months ago
Combining frontend-based memory with MFCC features for Bandwidth Extension of narrowband speech
In this paper, we continue our previous work on improving Bandwidth Extension (BWE) of narrowband speech. We have shown that including memory into the parametrization frontend (th...
Amr H. Nour-Eldin, Peter Kabal
PDP
2005
IEEE
14 years 4 months ago
Memory Bandwidth Aware Scheduling for SMP Cluster Nodes
Clusters of SMPs are becoming increasingly common. However, the shared memory design of SMPs and the consequential contention between system processors for access to main memory c...
Evangelos Koukis, Nectarios Koziris
CONCURRENCY
1998
130views more  CONCURRENCY 1998»
13 years 11 months ago
JPVM: network parallel computing in Java
The JPVM library is a software system for explicit message-passing based distributed memory MIMD parallel programming in Java. The library supports an interface similar to the C a...
Adam Ferrari
ARCS
2009
Springer
14 years 5 months ago
Evaluating CMPs and Their Memory Architecture
Abstract. Many-core processor architectures require scalable solutions that reflect the locality and power constraints of future generations of technology. This paper presents a CM...
Chris R. Jesshope, Mike Lankamp, Li Zhang