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FSTTCS
2004
Springer
15 years 11 months ago
Short-Cuts on Star, Source and Planar Unfoldings
When studying a 3D polyhedron, it is often easier to cut it open and atten in on the plane. There are several ways to perform this unfolding. Standard unfoldings which have been u...
Vijay Chandru, Ramesh Hariharan, Narasimha M. Kris...
MICRO
2003
IEEE
143views Hardware» more  MICRO 2003»
15 years 11 months ago
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik ...
PLDI
2003
ACM
15 years 11 months ago
A provably sound TAL for back-end optimization
Typed assembly languages provide a way to generate machinecheckable safety proofs for machine-language programs. But the soundness proofs of most existing typed assembly languages...
Juan Chen, Dinghao Wu, Andrew W. Appel, Hai Fang
IPPS
2002
IEEE
15 years 11 months ago
Can User-Level Protocols Take Advantage of Multi-CPU NICs?
Modern high speed interconnects such as Myrinet and Gigabit Ethernet have shifted the bottleneck in communication from the interconnect to the messaging software at the sending an...
Piyush Shivam, Pete Wyckoff, Dhabaleswar K. Panda
LCTRTS
2010
Springer
15 years 10 months ago
Cache vulnerability equations for protecting data in embedded processor caches from soft errors
Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, cac...
Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul