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IPPS
2002
IEEE
14 years 2 months ago
JPG - A Partial Bitstream Generation Tool to Support Partial Reconfiguration in Virtex FPGAs
Reconfigurable computing based on partial reconfiguration of field programmable gate arrays (FPGAs) is yet to move to the mainstream of computing. Hardware devices that support su...
Anup Kumar Raghavan, Peter Sutton
FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
14 years 2 months ago
A crosstalk-aware timing-driven router for FPGAs
As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstal...
Steven J. E. Wilton
FCCM
2000
IEEE
103views VLSI» more  FCCM 2000»
14 years 2 months ago
A Networked FPGA-Based Hardware Implementation of a Neural Network Application
This paper describes a networked FPGA-based implementation of the FAST (Flexible Adaptable-Size Topology) architecture, a Arti cial Neural Network (ANN) that dynamically adapts it...
Héctor Fabio Restrepo, Ralph Hoffmann, Andr...
DFT
1999
IEEE
125views VLSI» more  DFT 1999»
14 years 2 months ago
Algorithms for Efficient Runtime Fault Recovery on Diverse FPGA Architectures
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
John Lach, William H. Mangione-Smith, Miodrag Potk...
ATS
1998
IEEE
113views Hardware» more  ATS 1998»
14 years 2 months ago
Testing and Diagnosis of Interconnect Structures in FPGAs
Since Field programmable gate arrays (FPGAs) are reprogrammable, faults in them can be easily toleruted once fault sites are located. Previous researches on diagnosis of FPGAs mai...
Sying-Jyan Wang, Chao-Neng Huang