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2000
ACM
14 years 28 days ago
Using Hardware Performance Monitors to Isolate Memory Bottlenecks
In this paper, we present and evaluate two techniques that use different styles of hardware support to provide data structure specific processor cache information. In one approach...
Bryan R. Buck, Jeffrey K. Hollingsworth
HPCA
2011
IEEE
13 years 9 days ago
Exploiting criticality to reduce bottlenecks in distributed uniprocessors
Composable multicore systems merge multiple independent cores for running sequential single-threaded workloads. The performance scalability of these systems, however, is limited d...
Behnam Robatmili, Madhu Saravana Sibi Govindan, Do...
INFOCOM
2003
IEEE
14 years 1 months ago
Measuring Bottleneck Bandwidth of Targeted Path Segments
Abstract— Accurate measurement of network bandwidth is crucial for network management applications as well as flexible Internet applications and protocols which actively manage ...
Khaled Harfoush, Azer Bestavros, John W. Byers
VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
14 years 2 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
CEC
2003
IEEE
14 years 1 months ago
Where are bottlenecks in NK fitness landscapes?
Abstract- Usually the offspring-parent fitness correlation is used to visualize and analyze some caracteristics of fitness landscapes such as evolvability. In this paper, we intr...
Sébastien Vérel, Philippe Collard, M...