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» The locality of concurrent write barriers
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CAV
2010
Springer
187views Hardware» more  CAV 2010»
13 years 11 months ago
Fences in Weak Memory Models
We present a class of relaxed memory models, defined in Coq, parameterised by the chosen permitted local reorderings of reads and writes, and the visibility of inter- and intra-pr...
Jade Alglave, Luc Maranget, Susmit Sarkar, Peter S...
SSS
2010
Springer
103views Control Systems» more  SSS 2010»
13 years 5 months ago
A Provably Starvation-Free Distributed Directory Protocol
Abstract. This paper presents Combine, a distributed directory protocol for shared objects, designed for large-scale distributed systems. Directory protocols support move requests,...
Hagit Attiya, Vincent Gramoli, Alessia Milani
ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
14 years 1 months ago
An effective hybrid transactional memory system with strong isolation guarantees
We propose signature-accelerated transactional memory (SigTM), a hybrid TM system that reduces the overhead of software transactions. SigTM uses hardware signatures to track the r...
Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Au...
VRST
1999
ACM
13 years 11 months ago
Distributed Open Inventor: a practical approach to distributed 3D graphics
Distributed Open Inventor is an extension to the popular Open Inventor toolkit for interactive 3D graphics. The toolkit is extended with the concept of a distributed shared scene ...
Gerd Hesina, Dieter Schmalstieg, Anton L. Fuhrmann...
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 5 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...