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JPDC
2011
129views more  JPDC 2011»
13 years 2 months ago
Static timing analysis for modeling QoS in networks-on-chip
Networks-on-chip (NoCs) are used in a growing number of SoCs and multi-core processors. Because messages compete for the NoC’s shared resources, quality of service and resource ...
Evgeni Krimer, Isaac Keslassy, Avinoam Kolodny, Is...
SAC
2010
ACM
13 years 7 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
GECCO
2005
Springer
124views Optimization» more  GECCO 2005»
14 years 28 days ago
Evolving petri nets to represent metabolic pathways
Given concentrations of metabolites over a sequence of time steps, the metabolic pathway prediction problem seeks a set of reactions and rate constants for them that could yield t...
Jeremiah Nummela, Bryant A. Julstrom
MEMOCODE
2007
IEEE
14 years 1 months ago
MEMOCODE 2007 Co-Design Contest
New to the 2007 MEMOCODE conference is the HW/SW Co-Design Contest. Members of the technical and steering committees from MEMOCODE 2006 thought that the co-design practice is dist...
Forrest Brewer, James C. Hoe
SIGOPSE
1998
ACM
13 years 11 months ago
Nested Java processes: OS structure for mobile code
The majority of work on protection in single-language mobile code environments focuses on information security issues and depends on the language environment for solutions to the ...
Patrick Tullmann, Jay Lepreau