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» The scaling of interconnect buffer needs
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ICCAD
2006
IEEE
112views Hardware» more  ICCAD 2006»
14 years 4 months ago
A new RLC buffer insertion algorithm
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weip...
HPCA
2009
IEEE
14 years 2 months ago
MRR: Enabling fully adaptive multicast routing for CMP interconnection networks
On-network hardware support for multi-destination traffic is a desirable feature in most multiprocessor machines. Multicast hardware capabilities enable much more effective bandwi...
Pablo Abad Fidalgo, Valentin Puente, José-&...
INFOCOM
2006
IEEE
14 years 1 months ago
Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics
— Three-stage non-blocking switching fabrics are the next step in scaling current crossbar switches to many hundreds or few thousands of ports. Congestion (output contention) man...
Nikolaos Chrysos, Manolis Katevenis
EWSN
2010
Springer
13 years 11 months ago
Virtualising Testbeds to Support Large-Scale Reconfigurable Experimental Facilities
Experimentally driven research for wireless sensor networks is invaluable to provide benchmarking and comparison of new ideas. An increasingly common tool in support of this is a t...
Tobias Baumgartner, Ioannis Chatzigiannakis, Maick...
ISCA
2009
IEEE
214views Hardware» more  ISCA 2009»
14 years 2 months ago
Phastlane: a rapid transit optical routing network
Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable c...
Mark J. Cianchetti, Joseph C. Kerekes, David H. Al...