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ISLPED
1995
ACM
80views Hardware» more  ISLPED 1995»
13 years 11 months ago
Techniques for fast circuit simulation applied to power estimation of CMOS circuits
We present a transistor level power estimator which exploits algorithms for fast circuit simulation to compute the power dissipation of CMOS circuits. The proposed approach uses s...
Premal Buch, Shen Lin, Vijay Nagasamy, Ernest S. K...
WCAE
2006
ACM
14 years 1 months ago
PSATSim: an interactive graphical superscalar architecture simulator for power and performance analysis
Two of the most important design issues for modern processors are power and performance. It is important for students in computer organization classes to understand the tradeoff b...
Clint W. Smullen, Tarek M. Taha
DAC
2000
ACM
14 years 8 months ago
High-level simulation of substrate noise generation including power supply noise coupling
Substrate noise caused by large digital circuits will degrade the performance of analog circuits located on the same substrate. To simulate this performance degradation, the total...
Marc van Heijningen, Mustafa Badaroglu, Sté...
ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
14 years 4 months ago
A unified non-rectangular device and circuit simulation model for timing and power
— For 65nm and below devices, even after optical proximity correction (OPC), the gate may still be non-rectangular. There are several limited works on the device and circuit char...
Sean X. Shi, Peng Yu, David Z. Pan
AINA
2007
IEEE
14 years 2 months ago
Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
Antonio Flores, Juan L. Aragón, Manuel E. A...