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LCPC
1999
Springer
15 years 9 months ago
Compiling for Speculative Architectures
The traditional target machine of a parallelizing compiler can execute code sections either serially or in parallel. In contrast, targeting the generated code to a speculative para...
Seon Wook Kim, Rudolf Eigenmann
IPPS
2007
IEEE
15 years 11 months ago
Optimizing Inter-Nest Data Locality Using Loop Splitting and Reordering
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...
Sofiane Naci
ISCAPDCS
2008
15 years 6 months ago
Parallel Embedded Systems: Where Real-Time and Low-Power Meet
This paper introduces a combination of models and proofs for optimal power management via Dynamic Frequency Scaling and Dynamic Voltage Scaling. The approach is suitable for syste...
Zdravko Karakehayov, Yu Guo
AOSD
2009
ACM
15 years 11 months ago
Can we refactor conditional compilation into aspects?
Systems software uses conditional compilation to manage crosscutting concerns in a very fine-grained and efficient way, but at the expense of tangled and scattered conditional c...
Bram Adams, Wolfgang De Meuter, Herman Tromp, Ahme...
GLVLSI
2008
IEEE
169views VLSI» more  GLVLSI 2008»
15 years 4 months ago
Simultaneous optimization of memory configuration and code allocation for low power embedded systems
This paper proposes a hybrid memory architecture which consists of the following two regions; 1) a dynamic power conscious region which uses low Vdd and Vth and 2) a static power ...
Tadayuki Matsumura, Tohru Ishihara, Hiroto Yasuura