2 search results - page 1 / 1 » Thermal Management of On-Chip Caches Through Power Density M... |
MICRO
2005
IEEE
14 years 4 months ago
2005
IEEE
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
DAC
2009
ACM
14 years 12 months ago
2009
ACM
Exponentially rising cooling/packaging costs due to high power density call for architectural and software-level thermal management. Dynamic thermal management (DTM) techniques co...