- With the increasing levels of variability in the behavior of manufactured nano-scale devices and dramatic changes in the power density on a chip, timely identification of hot spo...
Models of Memory Management Greg Morrisett Matthias Felleisen Robert Harper January 1995 CMU{CS{95{110 School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 Al...
J. Gregory Morrisett, Matthias Felleisen, Robert H...
Therequirementsfor amain memorydatastoragemodel are both compactnessand efficient processing for all database operations. The DBGraph storage model, proposed in this paper, achiev...
File systems make use of part of DRAM as the buffer cache to enhance its performance in traditional systems. In this paper, we consider the use of Non-Volatile RAM (NVRAM) as a w...
In Hwan Doh, Hyo J. Lee, Young Je Moon, Eunsam Kim...
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...