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» Thermal-aware task scheduling at the system software level
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AHS
2006
IEEE
142views Hardware» more  AHS 2006»
14 years 2 months ago
On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition
To increase the flexibility of single-chip evolvable hardware systems, we explore possibilities of systems with the evolutionary algorithm implemented in software on an onchip pr...
Kyrre Glette, Jim Torresen, Moritoshi Yasunaga, Yo...
GLVLSI
2007
IEEE
211views VLSI» more  GLVLSI 2007»
14 years 3 months ago
Multi-processor operating system emulation framework with thermal feedback for systems-on-chip
Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power densi...
Salvatore Carta, Andrea Acquaviva, Pablo Garcia De...
PLDI
2003
ACM
14 years 1 months ago
Compile-time dynamic voltage scaling settings: opportunities and limits
With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-t...
Fen Xie, Margaret Martonosi, Sharad Malik
CC
2008
Springer
193views System Software» more  CC 2008»
13 years 10 months ago
Automatic Transformations for Communication-Minimized Parallelization and Locality Optimization in the Polyhedral Model
The polyhedral model provides powerful abstractions to optimize loop nests with regular accesses. Affine transformations in this model capture a complex sequence of execution-reord...
Uday Bondhugula, Muthu Manikandan Baskaran, Sriram...
WCRE
2003
IEEE
14 years 1 months ago
Problems Creating Task-relevant Clone Detection Reference Data
One prevalent method for evaluating the results of automated software analysis tools is to compare the tools’ output to the judgment of human experts. This evaluation strategy i...
Andrew Walenstein, Nitin Jyoti, Junwei Li, Yun Yan...