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IPPS
2006
IEEE
14 years 4 months ago
Compiler assisted dynamic management of registers for network processors
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...
ARCS
2005
Springer
14 years 3 months ago
Energy Management for Embedded Multithreaded Processors with Integrated EDF Scheduling
Abstract. This paper proposes a new hardware-based energy management technique for future embedded multithreaded processors with integrated Earliest Deadline First (EDF) real-time ...
Sascha Uhrig, Theo Ungerer
HICSS
1995
IEEE
109views Biometrics» more  HICSS 1995»
14 years 1 months ago
The architecture of an optimistic CPU: the WarpEngine
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
John G. Cleary, Murray Pearson, Husam Kinawi
CCR
2008
65views more  CCR 2008»
13 years 10 months ago
The future in your pocket
There is a growing sentiment among academics in computing that a shift to multicore processors in commodity computers will demand that all programmers become parallel programmers....
Patrick Crowley
ENTCS
2007
116views more  ENTCS 2007»
13 years 10 months ago
DisCComp - A Formal Model for Distributed Concurrent Components
Most large-scaled software systems are structured in distributed components to manage complexity and have to cope with concurrent executed threads. System decomposition and concur...
Andreas Rausch