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POPL
2005
ACM
14 years 10 months ago
2005
ACM
A lightweight logical approach to race-free sharing of heap storage between concurrent threads is described, based on the notion of permission to access. Transfer of permission be...
CC
2010
Springer
14 years 4 months ago
2010
Springer
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
CF
2011
ACM
12 years 10 months ago
2011
ACM
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
ISCA
2007
IEEE
14 years 4 months ago
2007
IEEE
There has been considerable recent interest in the support of transactional memory (TM) in both hardware and software. We present an intermediate approach, in which hardware is us...
ISSTA
2004
ACM
14 years 3 months ago
2004
ACM
The notion that certain procedures are atomic is a fundamental correctness property of many multithreaded software systems. A procedure is atomic if for every execution there is a...