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» Three-valued logic in bounded model checking
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TPHOL
2005
IEEE
14 years 1 months ago
From PSL to LTL: A Formal Validation in HOL
Using the HOL theorem prover, we proved the correctness of a translation from a subset of Accellera’s property specification language PSL to linear temporal logic LTL. Moreover,...
Thomas Tuerk, Klaus Schneider
CORR
2009
Springer
242views Education» more  CORR 2009»
13 years 5 months ago
Adaptive Scheduling of Data Paths using Uppaal Tiga
Abstract. We apply Uppaal Tiga to automatically compute adaptive scheduling strategies for an industrial case study dealing with a state-of-the-art image processing pipeline of a p...
Israa AlAttili, Fred Houben, Georgeta Igna, Steffe...
POPL
2012
ACM
12 years 3 months ago
Playing in the grey area of proofs
Interpolation is an important technique in verification and static analysis of programs. In particular, interpolants extracted from proofs of various properties are used in invar...
Krystof Hoder, Laura Kovács, Andrei Voronko...
DFG
2004
Springer
13 years 11 months ago
Modeling and Formal Verification of Production Automation Systems
This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wo...
ICSE
2007
IEEE-ACM
14 years 7 months ago
Sequential Circuits for Relational Analysis
The Alloy tool-set has been gaining popularity as an alternative to traditional manual testing and checking for design correctness. Alloy uses a first-order relational logic for m...
Fadi A. Zaraket, Adnan Aziz, Sarfraz Khurshid