Sciweavers

341 search results - page 2 / 69
» Tile-graph-based power planning
Sort
View
AISC
2004
Springer
14 years 1 months ago
Planning and Patching Proof
We describe proof planning: a technique for both describing the hierarchical structure of proofs and then using this structure to guide proof attempts. When such a proof attempt fa...
Alan Bundy
BMCBI
2006
90views more  BMCBI 2006»
13 years 7 months ago
The PowerAtlas: a power and sample size atlas for microarray experimental design and research
Background: Microarrays permit biologists to simultaneously measure the mRNA abundance of thousands of genes. An important issue facing investigators planning microarray experimen...
Grier P. Page, Jode W. Edwards, Gary L. Gadbury, P...
ASPDAC
2001
ACM
75views Hardware» more  ASPDAC 2001»
13 years 11 months ago
Integrated power supply planning and floorplanning
One of the most challenging issues in today's high-performance VLSI design is to ensure high-quality power supply to each individual circuit blocks. Reduced power supply volt...
I-Min Liu, Hung-Ming Chen, Tan-Li Chou, Adnan Aziz...
AIIDE
2007
13 years 10 months ago
SquadSmart: Hierarchical Planning and Coordinated Plan Execution for Squads of Characters
This paper presents an application of Hierarchical Transition Network (HTN) planning to a squad-based military simulation. The hierarchical planner produces collaborative plans fo...
Peter Gorniak, Ian Davis
ECAI
2004
Springer
14 years 1 months ago
An Investigation into the Expressive Power of PDDL2.1
The planning domain language PDDL2.1, used in the 3rd International Planning Competition, has sparked off some controversy in the planning community as researchers consider its exp...
Maria Fox, Derek Long, Keith Halsey