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» Time, Hardware, and Uniformity
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CGO
2003
IEEE
14 years 2 months ago
Dynamic Trace Selection Using Performance Monitoring Hardware Sampling
Optimizing programs at run-time provides opportunities to apply aggressive optimizations to programs based on information that was not available at compile time. At run time, prog...
Howard Chen, Wei-Chung Hsu, Dong-yuan Chen
GLVLSI
2002
IEEE
127views VLSI» more  GLVLSI 2002»
14 years 1 months ago
A new look at hardware maze routing
This paper describes a new design for a hardware accelerator to support grid-based Maze Routing. Based on the direct mapped approach of Breuer and Shamsa [3], this work refines th...
John A. Nestor
VLSI
2007
Springer
14 years 3 months ago
Impact of hardware emulation on the verification quality improvement
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
Youssef Serrestou, Vincent Beroulle, Chantal Robac...
STOC
1989
ACM
99views Algorithms» more  STOC 1989»
14 years 1 months ago
A Random Polynomial Time Algorithm for Approximating the Volume of Convex Bodies
We present a randomised polynomial time algorithm for approximating the volume of a convex body K in n-dimensional Euclidean space. The proof of correctness of the algorithm relie...
Martin E. Dyer, Alan M. Frieze, Ravi Kannan
DEXA
2004
Springer
106views Database» more  DEXA 2004»
14 years 2 months ago
A Graph-Based Data Model to Represent Transaction Time in Semistructured Data
Abstract. In this paper we propose the Graphical sEmistructured teMporal data model (GEM), which is based on labeled graphs and allows one to represent in a uniform way semistructu...
Carlo Combi, Barbara Oliboni, Elisa Quintarelli