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» Time Management in The High Level Architecture
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ICUMT
2009
13 years 6 months ago
Effective buffer and storage management in DTN nodes
Current wired networks have been developed on the basis of the AIMD principle, which offers increased performance and fairness. Nevertheless, there is a vast spectrum of networks, ...
Stylianos Dimitriou, Vassilis Tsaoussidis
VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
14 years 9 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
INFOCOM
2000
IEEE
14 years 1 months ago
Data Broadcasting and Seamless Channel Transition for Highly-Demanded Videos
—One way to broadcast a popular video is to use a number of dedicated channels, each responsible for broadcasting some portion of the video periodically in a predefined way. The ...
Yu-Chee Tseng, Chi-Ming Hsieh, Ming-Hour Yang, Wen...
ISCA
2007
IEEE
94views Hardware» more  ISCA 2007»
13 years 8 months ago
Tailoring quantum architectures to implementation style: a quantum computer for mobile and persistent qubits
In recent years, quantum computing (QC) research has moved from the realm of theoretical physics and mathematics into real implementations [9]. With many different potential hardw...
Eric Chi, Stephen A. Lyon, Margaret Martonosi
TVLSI
2010
13 years 3 months ago
Architectural Enhancement and System Software Support for Program Code Integrity Monitoring in Application-Specific Instruction-
Program code in a computer system can be altered either by malicious security attacks or by various faults in microprocessors. At the instruction level, all code modifications are ...
Hai Lin, Yunsi Fei, Xuan Guan, Zhijie Jerry Shi