652 search results - page 68 / 131 » Time Management in The High Level Architecture |
FDL
2003
IEEE
14 years 2 months ago
2003
IEEE
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
ERSA
2004
13 years 10 months ago
2004
In this paper, we propose an architecture for floatingpoint based LU decomposition for large-sized matrices. Our proposed architecture is based on the well known concept of blocki...
VLSID
2005
IEEE
14 years 9 months ago
2005
IEEE
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
SAMT
2007
Springer
14 years 2 months ago
2007
Springer
Performing simple keyword-based search has long been the only way to access information. But for a truly comprehensive search on multimedia data, this approach is no longer su cien...
GRID
2007
Springer
13 years 8 months ago
2007
Springer
The GEMSS project has developed a service-oriented Grid that supports the provision of medical simulation services by service providers to clients such as hospitals. We outline the...