652 search results - page 88 / 131 » Time Management in The High Level Architecture |
DAC
2004
ACM
14 years 9 months ago
2004
ACM
Logic duplication, a commonly used synthesis technique to remove trapped inverters in reconvergent paths of Domino circuits, incurs high area and power penalties. In this paper, w...
RSP
2006
IEEE
14 years 2 months ago
2006
IEEE
In a hardware-software co-design environment, an application is partitioned into modules. Each module is then mapped either to software or to hardware. The mapping process is driv...
MM
1995
ACM
14 years 9 days ago
1995
ACM
As common as video processing is, programmers still implement video programs as manipulations of arrays of pixels. This paper presents a language extension called Rivl (pronounced...
RAS
2006
13 years 8 months ago
2006
The Life in the Atacama (LITA) project seeks to develop technologies for robotic life detection and apply them to the investigation of the Atacama Desert. Its field investigation ...
Publication
Congestion avoidance mechanisms allow a network to operate in the optimal region of low delay and high throughput, thereby, preventing the network from becoming congested. This is ...