36 search results - page 6 / 8 » Time Predictable CPU and DMA Shared Memory Access |
ICS
2000
Tsinghua U.
13 years 11 months ago
2000
Tsinghua U.
As the performance gap between the CPU and main memory continues to grow, techniques to hide memory latency are essential to deliver a high performance computer system. Prefetchin...
HPCA
2012
IEEE
12 years 3 months ago
2012
IEEE
Main memory latencies have always been a concern for system performance. Given that reads are on the critical path for CPU progress, reads must be prioritized over writes. However...
ECRTS
2010
IEEE
13 years 8 months ago
2010
IEEE
Schedulability analysis for hard real-time systems requires bounds on the execution times of its tasks. To obtain useful bounds in the presence of caches, static timing analyses mu...
IISWC
2006
IEEE
14 years 1 months ago
2006
IEEE
— As CMPs are emerging as the dominant architecture for a wide range of platforms (from embedded systems and game consoles, to PCs, and to servers) the need to manage on-chip res...
WSC
2001
13 years 9 months ago
2001
To enhance the widespread use of a parallel supply chain simulator, a web front-end that enables access at any time and from any location has been developed. The front-end provide...