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» Time Space Sharing Scheduling and Architectural Support
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ECRTS
2008
IEEE
14 years 2 months ago
Cache-Aware Real-Time Scheduling on Multicore Platforms: Heuristics and a Case Study
Multicore architectures, which have multiple processing units on a single chip, have been adopted by most chip manufacturers. Most such chips contain on-chip caches that are share...
John M. Calandrino, James H. Anderson
CCE
2007
13 years 9 months ago
Supporting Shared Understanding within Distributed Enterprise Development Teams
: This paper presents a practitioners’ report on supporting shared understanding within distributed development teams. Our software domain focuses on Enterprise development in th...
Jessica Rubart, Stephan Müller
ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
14 years 1 months ago
Scheduling algorithm for partially parallel architecture of LDPC decoder by matrix permutation
— The fully parallel LDPC decoding architecture can achieve high decoding throughput, but it suffers from large hardware complexity caused by a large set of processing units and ...
In-Cheol Park, Se-Hyeon Kang
ICC
2007
IEEE
132views Communications» more  ICC 2007»
13 years 11 months ago
Supporting Bulk Data Transfers of High-End Applications with Guaranteed Completion Time
In high-end grid networks, distributed resources (scientific instruments, CPUs, storages, etc.) are interconnected to support computing-intensive and data-intensive applications, w...
Bin Bin Chen, Pascale Vicat-Blanc Primet
RTAS
2006
IEEE
14 years 1 months ago
Real-Time Scheduling on Multicore Platforms
Multicore architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance, given that thermal and power pr...
James H. Anderson, John M. Calandrino, UmaMaheswar...