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» Time and Space Lower Bounds for Implementations Using k-CAS
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ASPLOS
2000
ACM
14 years 29 days ago
Architecture and design of AlphaServer GS320
This paper describes the architecture and implementation of the AlphaServer GS320, a cache-coherent non-uniform memory access multiprocessor developed at Compaq. The AlphaServer G...
Kourosh Gharachorloo, Madhu Sharma, Simon Steely, ...
IFIP
2004
Springer
14 years 2 months ago
The Inherent Queuing Delay of Parallel Packet Switches
The parallel packet switch (PPS) extends the inverse multiplexing architecture, and is extensively used as the core of contemporary commercial switches. A key factor in the perfor...
Hagit Attiya, David Hay
TON
2008
109views more  TON 2008»
13 years 8 months ago
Efficient routing in intermittently connected mobile networks: the single-copy case
Abstract--Intermittently connected mobile networks are wireless networks where most of the time there does not exist a complete path from the source to the destination. There are m...
Thrasyvoulos Spyropoulos, Konstantinos Psounis, Ca...
IPPS
2007
IEEE
14 years 2 months ago
Probability Convergence in a Multithreaded Counting Application
The problem of counting specified combinations of a given set of variables arises in many statistical and data mining applications. To solve this problem, we introduce the PDtree...
Chad Scherrer, Nathaniel Beagley, Jarek Nieplocha,...
SIGECOM
2010
ACM
164views ECommerce» more  SIGECOM 2010»
14 years 1 months ago
Truthful mechanisms with implicit payment computation
It is widely believed that computing payments needed to induce truthful bidding is somehow harder than simply computing the allocation. We show that the opposite is true for singl...
Moshe Babaioff, Robert D. Kleinberg, Aleksandrs Sl...