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» Timed Circuit Synthesis Using Implicit Methods
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ICCD
2004
IEEE
172views Hardware» more  ICCD 2004»
14 years 4 months ago
A Signal Integrity Test Bed for PCB Buses
Research in high-speed interconnect requires physical test to validate circuit models and design assumptions. At multi-Gbit/sec rates, physical implementations require custom circ...
Jihong Ren, Mark R. Greenstreet
CVPR
2008
IEEE
14 years 9 months ago
Action recognition using exemplar-based embedding
In this paper, we address the problem of representing human actions using visual cues for the purpose of learning and recognition. Traditional approaches model actions as space-ti...
Daniel Weinland, Edmond Boyer
TCAD
2008
114views more  TCAD 2008»
13 years 7 months ago
Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns
At-speed functional testing, delay testing, and n-detection test sets are being used today to detect deep submicrometer defects. However, the resulting test data volumes are too hi...
Zhanglei Wang, Krishnendu Chakrabarty
BMCBI
2008
111views more  BMCBI 2008»
13 years 7 months ago
MLIP: using multiple processors to compute the posterior probability of linkage
Background: Localization of complex traits by genetic linkage analysis may involve exploration of a vast multidimensional parameter space. The posterior probability of linkage (PP...
Manika Govil, Alberto Maria Segre, Veronica J. Vie...
ISBI
2004
IEEE
14 years 8 months ago
Statistical Surface-Based Morphometry Using a Non-Parametric Approach
We present a novel method of statistical surface-based morphometry based on the use of non-parametric permutation tests. In order to evaluate morphologicaldifferences of brain str...
Dimitrios Pantazis, Richard M. Leahy, Thomas E. Ni...