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ISSS
1998
IEEE
130views Hardware» more  ISSS 1998»
14 years 29 days ago
Communication and Interface Synthesis on a Rapid Prototyping Hardware/Software Codesign System
In this paper, we propose the target board architecture of a rapid prototyping embedded system based on hardware software codesign. The target board contains a TMS320C30 DSP proce...
Yin-Tsung Hwang, Yuan-Hung Wang
SEUS
2010
IEEE
13 years 7 months ago
Code Generation for Embedded Java with Ptolemy
Abstract. Code generation from models is the ultimate goal of model-based design. For real-time systems the generated code must be analyzable for the worstcase execution time (WCET...
Martin Schoeberl, Christopher Brooks, Edward A. Le...
WORDS
2003
IEEE
14 years 2 months ago
Timing Analysis of Optimised Code
Timing analysis is a crucial test for dependable hard real-time systems (DHRTS). The calculation of the worst-case execution time (WCET) is mandatory. As modern compilers are capa...
Raimund Kirner, Peter P. Puschner
APSEC
2005
IEEE
14 years 2 months ago
Model Checking Interrupt-Dependent Software
Embedded control programs are hard to analyse because their behaviour depends on how they interact with hardware devices. In particular, embedded code typically uses interrupts to...
Colin J. Fidge, Phil Cook
ASAP
2005
IEEE
133views Hardware» more  ASAP 2005»
14 years 2 months ago
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...