758 search results - page 25 / 152 » Timing Analysis of Optimised Code |
AHS
2006
IEEE
14 years 4 months ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
PDP
2003
IEEE
14 years 3 months ago
2003
IEEE
We describe a robust library for parallel and dependable master-worker programs (raftnet). From a software client’s viewpoint, flexibility, hardware independence and ease of us...
ACSE
1997
ACM
14 years 2 months ago
1997
ACM
Software development projects are an essential component of software engineering courses. They provide the opportunity for students to apply theoretical material and to gain valua...
CASES
2005
ACM
13 years 12 months ago
2005
ACM
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...