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» Timing Optimization of Logic Network Using Gate Duplication
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DSN
2009
IEEE
14 years 2 months ago
Low overhead Soft Error Mitigation techniques for high-performance and aggressive systems
The threat of soft error induced system failure in high performance computing systems has become more prominent, as we adopt ultra-deep submicron process technologies. In this pap...
Naga Durga Prasad Avirneni, Viswanathan Subramania...
ICDE
2006
IEEE
144views Database» more  ICDE 2006»
14 years 9 months ago
Network-Aware Operator Placement for Stream-Processing Systems
To use their pool of resources efficiently, distributed stream-processing systems push query operators to nodes within the network. Currently, these operators, ranging from simple...
Peter R. Pietzuch, Jonathan Ledlie, Jeffrey Shneid...
TCAD
2008
93views more  TCAD 2008»
13 years 7 months ago
Transforming Cyclic Circuits Into Acyclic Equivalents
Abstract--Designers and high-level synthesis tools can introduce unwanted cycles in digital circuits, and for certain combinational functions, cyclic circuits that are stable and d...
Osama Neiroukh, Stephen A. Edwards, Xiaoyu Song
ICS
2005
Tsinghua U.
14 years 29 days ago
Continuous Replica Placement schemes in distributed systems
The Replica Placement Problem (RPP) aims at creating a set of duplicated data objects across the nodes of a distributed system in order to optimize certain criteria. Typically, RP...
Thanasis Loukopoulos, Petros Lampsas, Ishfaq Ahmad
BMCBI
2008
214views more  BMCBI 2008»
13 years 7 months ago
Accelerating String Set Matching in FPGA Hardware for Bioinformatics Research
Background: This paper describes techniques for accelerating the performance of the string set matching problem with particular emphasis on applications in computational proteomic...
Yoginder S. Dandass, Shane C. Burgess, Mark Lawren...