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» Timing Tolerances in Safety-Critical Software
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HICSS
1995
IEEE
109views Biometrics» more  HICSS 1995»
14 years 1 months ago
The architecture of an optimistic CPU: the WarpEngine
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
John G. Cleary, Murray Pearson, Husam Kinawi
CASES
2009
ACM
14 years 4 months ago
CheckerCore: enhancing an FPGA soft core to capture worst-case execution times
Embedded processors have become increasingly complex, resulting in variable execution behavior and reduced timing predictability. On such processors, safe timing specifications e...
Jin Ouyang, Raghuveer Raghavendra, Sibin Mohan, Ta...
CONEXT
2006
ACM
14 years 3 months ago
Modeling ping times in first person shooter games
In First Person Shooter (FPS) games the Round Trip Time (RTT), i.e., the sum of the network delay from client to server and the network delay from server to client, impacts the ga...
Natalie Degrande, Danny De Vleeschauwer, Robert E....
TASE
2008
IEEE
13 years 9 months ago
Vision-Based Online Process Control in Manufacturing Applications
Applications such as layered manufacturing, or in general, solid free-form fabrication, pose a major challenge on online process control. For these parts to be functional, it is i...
Yuan Cheng, Mohsen A. Jafari
CORR
2010
Springer
88views Education» more  CORR 2010»
13 years 10 months ago
Kinematic modelling of a 3-axis NC machine tool in linear and circular interpolation
Machining time is a major performance criterion when it comes to high speed machining. CAM software can help in estimating that time for a given strategy. But in practice, CAM pro...
Xavier Pessoles, Yann Landon, Walter Rubio