11 search results - page 3 / 3 » Timing Verification with Crosstalk for Transparently Latched... |
GLVLSI
2008
IEEE
14 years 1 months ago
2008
IEEE
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...