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RTAS
2008
IEEE
16 years 11 days ago
Modular Code Generation from Triggered and Timed Block Diagrams
In previous work we have shown how modular code can be automatically generated from a synchronous block diagram notation where all blocks fire at all times. Here, we extend this ...
Roberto Lublinerman, Stavros Tripakis
RTCSA
2006
IEEE
16 years 13 hour ago
Portable Execution Time Analysis Method
We propose a new execution time prediction method that combines measurement-based execution time analysis and simulation-based memory access analysis. In measurement-based executi...
Keiji Yamamoto, Yutaka Ishikawa, Toshihiro Matsui
RTCSA
2005
IEEE
15 years 11 months ago
Scheduling Support for Guaranteed Time Services in IEEE 802.15.4 Low Rate WPAN
We propose a real-time message scheduling algorithm which is applied to schedule periodic realtime messages in IEEE 802.15.4 for LR-WPAN(Low Rate Wireless Personal Area Network). ...
Seongeun Yoo, Daeyoung Kim, Minh-Long Pham, Yoonme...
RTAS
2003
IEEE
15 years 11 months ago
Probabilistic Worst-Case Response-Time Analysis for the Controller Area Network
This paper presents a novel approach for calculating a probabilistic worst-case response-time for messages in the Controller Area Network (CAN). CAN uses a bit-stuffing mechanism...
Thomas Nolte, Hans Hansson, Christer Norström
RTAS
2008
IEEE
16 years 11 days ago
Hybrid Timing Analysis of Modern Processor Pipelines via Hardware/Software Interactions
Embedded systems are often subject to constraints that require determinism to ensure that task deadlines are met. Such systems are referred to as real-time systems. Schedulability...
Sibin Mohan, Frank Mueller