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113
Voted
ICDCSW
2003
IEEE
15 years 7 months ago
SACCS: Scalable Asynchronous Cache Consistency Scheme for Mobile Environments
In this paper, we propose a novel cache consistency maintenance scheme, called Ë Ð Ð ×ÝÒ ÖÓÒÓÙ× ÓÒ× ×Ø Ò Ý Ë Ñ (SACCS), for mobile environments. It relies on ...
Zhijun Wang, Sajal K. Das, Hao Che, Mohan Kumar
108
Voted
HPCA
1996
IEEE
15 years 6 months ago
Predictive Sequential Associative Cache
In this paper, we propose a cache design that provides the same miss rate as a two-way set associative cache, but with a access time closer to a direct-mapped cache. As with other...
Brad Calder, Dirk Grunwald, Joel S. Emer
153
Voted
ISPASS
2009
IEEE
15 years 9 months ago
Accurately approximating superscalar processor performance from traces
Trace-driven simulation of superscalar processors is particularly complicated. The dynamic nature of superscalar processors combined with the static nature of traces can lead to l...
Kiyeon Lee, Shayne Evans, Sangyeun Cho
SBACPAD
2003
IEEE
135views Hardware» more  SBACPAD 2003»
15 years 7 months ago
Adaptive Compressed Caching: Design and Implementation
In this paper, we reevaluate the use of adaptive compressed caching to improve system performance through the reduction of accesses to the backing stores. We propose a new adaptab...
Rodrigo S. de Castro, Alair Pereira do Lago, Dilma...
120
Voted
ICS
1999
Tsinghua U.
15 years 6 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer