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ICDCN
2009
Springer
14 years 5 months ago
Fault-Tolerant Implementations of Regular Registers by Safe Registers with Applications to Networks
We present the first wait-free and self-stabilizing implementation of a single-writer/single-reader regular register by single-writer/single-reader safe registers. The constructio...
Colette Johnen, Lisa Higham
ISVLSI
2003
IEEE
118views VLSI» more  ISVLSI 2003»
14 years 4 months ago
Networks-On-Chip: The Quest for On-Chip Fault-Tolerant Communication
In this paper, we discuss the possibility of achieving onchip fault-tolerant communication based on a new communication paradigm called stochastic communication. Specifically, for...
Radu Marculescu