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» Tolerating data access latency with register preloading
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112
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ACSAC
2008
IEEE
15 years 10 months ago
Defending Against Attacks on Main Memory Persistence
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
William Enck, Kevin R. B. Butler, Thomas Richardso...
136
Voted
PVLDB
2010
134views more  PVLDB 2010»
15 years 1 months ago
High-Performance Dynamic Pattern Matching over Disordered Streams
Current pattern-detection proposals for streaming data recognize the need to move beyond a simple regular-expression model over strictly ordered input. We continue in this directi...
Badrish Chandramouli, Jonathan Goldstein, David Ma...
141
Voted
ICDCS
1995
IEEE
15 years 7 months ago
Specifying Weak Sets
nt formal speci cations of a new abstraction, weak sets, which can be used to alleviate high latencies when retrieving data from a wide-area information system like the World Wide...
Jeannette M. Wing, David C. Steere