We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhan...
In this paper, we study the problem of indexing multidimensional data in the P2P networks based on distributed hash tables (DHTs). We identify several design issues and propose a ...
Due to the increasing complexity, the behavior of large-scale distributed systems becomes difficult to predict. The ability of on-line identification and autotuning of adaptive co...
One of the major overheads that prohibits the wide spread deployment of parallel discrete event simulation PDES is the need to synchronize the distributed processes in the simulat...
Narayanan V. Thondugulam, Dhananjai Madhava Rao, R...
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...