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ASPLOS
1992
ACM
14 years 1 months ago
Efficient Superscalar Performance Through Boosting
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...
Michael D. Smith, Mark Horowitz, Monica S. Lam
CSFW
2010
IEEE
14 years 26 days ago
Approximation and Randomization for Quantitative Information-Flow Analysis
—Quantitative information-flow analysis (QIF) is an emerging technique for establishing information-theoretic confidentiality properties. Automation of QIF is an important step...
Boris Köpf, Andrey Rybalchenko
ICSE
2000
IEEE-ACM
14 years 16 days ago
Reverse engineering: a roadmap
By the early 1990s the need for reengineering legacy systems was already acute, but recently the demand has increased significantly with the shift toward web-based user interfaces...
Hausi A. Müller, Jens H. Jahnke, Dennis B. Sm...
LCPC
2000
Springer
14 years 16 days ago
Improving Offset Assignment for Embedded Processors
Embedded systems consisting of the application program ROM, RAM, the embedded processor core, and any custom hardware on a single wafer are becoming increasingly common in applicat...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
CAV
2008
Springer
131views Hardware» more  CAV 2008»
13 years 11 months ago
Validating High-Level Synthesis
The growing design-productivity gap has made designers shift toward using high-level languages like C, C++ and Java to do system-level design. High-Level Synthesis (HLS) is the pro...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta