204 search results - page 11 / 41 » Trace Processors |
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...
CGF
2008
13 years 8 months ago
2008
We present the Memory Trace Visualizer (MTV), a tool that provides interactive visualization and analysis of the sequence of memory operations performed by a program as it runs. A...
EGH
2010
Springer
13 years 6 months ago
2010
Springer
This paper proposes a massively parallel hardware architecture for efficient tracing of incoherent rays, e.g. for global illumination. The general approach is centered around hier...
EUROPAR
2009
Springer
14 years 3 months ago
2009
Springer
The size of supercomputers in numbers of processors is growing exponentially. Today’s largest supercomputers have upwards of a hundred thousand processors and tomorrow’s may ha...
IPPS
2008
IEEE
14 years 3 months ago
2008
IEEE
The modeling of power and thermal behavior of modern processors requires challenging validation approaches, which may be complex and in some cases unreliable. In order to address ...