1640 search results - page 64 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
176
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RTAS
2007
IEEE
16 years 1 months ago
2007
IEEE
Stochastic analysis techniques for real-time systems model the execution time of tasks as random variables. These techniques constitute a very powerful tool to study the behaviour...
193
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DAC
2009
ACM
16 years 8 months ago
2009
ACM
Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software ? e.g., into sequent...
193
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EMSOFT
2006
Springer
15 years 10 months ago
2006
Springer
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
201
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WCET
2010
15 years 4 months ago
2010
To take full advantage of the increasingly used shared-memory multicore architectures, software algorithms will need to be parallelized over multiple threads. This means that thre...
179
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IPPS
2008
IEEE
16 years 1 months ago
2008
IEEE
This paper presents general techniques for formally modeling, simulating, and model checking real-time resource-sharing protocols in Real-Time Maude. The “scheduling subset” o...