1516 search results - page 51 / 304 » Trends in Software Verification |
SIGSOFT
2007
ACM
14 years 9 months ago
2007
ACM
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
TPHOL
1999
IEEE
14 years 1 months ago
1999
IEEE
Abstract. Intel is applying formal verification to various pieces of mathematical software used in Merced, the first implementation of the new IA-64 architecture. This paper discus...
CATS
2006
13 years 10 months ago
2006
This paper gives an overview of a pilot project on the specification and verification of the L4 highperformance microkernel. Of the three aspects examined in the project, we descr...
DAGSTUHL
2001
13 years 10 months ago
2001
A powerful approach to finding errors in computer software is to translate a given program into a verification condition, a logical formula that is valid if and only if the program...
ENTCS
2006
13 years 8 months ago
2006
Effective formal verification tools require that robust implementations of automatic procedures for first-order logic and satisfiability modulo theories be integrated into express...