4116 search results - page 130 / 824 » Type Analysis for CHIP |
FPL
2006
Springer
14 years 17 days ago
2006
Springer
A new large constraint length, soft decision viterbi decoder fabric is presented for deployment using platform based system on chip methodologies. The decoder can be reconfigured ...
DAC
2005
ACM
13 years 11 months ago
2005
ACM
This paper presents an eļ¬cient hardware architecture of an on-chip logic minimization coprocessor. The proposed architecture employs TCAM cells to provide fastest and memory eļ¬...
CORR
2002
Springer
13 years 8 months ago
2002
Springer
Floor-planning is a fundamental step in VLSI chip design. Based upon the concept of orderly spanning trees, we present a simple O(n)-time algorithm to construct a floor-plan for a...
ICLP
2005
Springer
14 years 2 months ago
2005
Springer
Abstract. Information about the nondeterminism behavior of a functional logic program is important for various reasons. For instance, a nondeterministic choice in I/O operations re...
VTC
2008
IEEE
14 years 3 months ago
2008
IEEE
ā In this paper, we provide a framework for the asymptotic performance analysis of spaceātime codes (STCs) in correlated Ricean fading and nonāGaussian noise and interference...