Sciweavers

4116 search results - page 53 / 824
» Type Analysis for CHIP
Sort
View
ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
14 years 5 months ago
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
Krishnan Srinivasan, Karam S. Chatha, Goran Konjev...
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 2 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
ISQED
2003
IEEE
109views Hardware» more  ISQED 2003»
14 years 2 months ago
Optimizing the Energy-Delay-Ringing Product in On-Chip CMOS Line Drivers
Abstract- This paper presents a detailed empirical study and analytical derivation of voltage wave-form and energy dissipation of global lines driven by CMOS drivers. It is shown t...
Soroush Abbaspour, Massoud Pedram, Payam Heydari
DATE
2002
IEEE
154views Hardware» more  DATE 2002»
14 years 1 months ago
Low Power Error Resilient Encoding for On-Chip Data Buses
As technology scales toward deep submicron, on-chip interconnects are becoming more and more sensitive to noise sources such as power supply noise, crosstalk, radiation induced ef...
Davide Bertozzi, Luca Benini, Giovanni De Micheli
PAKDD
2010
ACM
175views Data Mining» more  PAKDD 2010»
14 years 21 days ago
EigenSpokes: Surprising Patterns and Scalable Community Chipping in Large Graphs
Abstract. We report a surprising, persistent pattern in large sparse social graphs, which we term EigenSpokes. We focus on large Mobile Call graphs, spanning about 186K nodes and m...
B. Aditya Prakash, Ashwin Sridharan, Mukund Seshad...