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» Types for Dynamic Reconfiguration
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FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
14 years 13 days ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
CODES
2002
IEEE
14 years 1 months ago
Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
Juanjo Noguera, Rosa M. Badia
FPL
2000
Springer
128views Hardware» more  FPL 2000»
14 years 9 days ago
Verification of Dynamically Reconfigurable Logic
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standa...
David Robinson, Patrick Lysaght
FCCM
1999
IEEE
134views VLSI» more  FCCM 1999»
14 years 1 months ago
Runlength Compression Techniques for FPGA Configurations
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
Scott Hauck, William D. Wilson
ESOP
1992
Springer
14 years 24 days ago
Dynamic Typing
Dynamic typing is a program analysis targeted at removing runtime tagging and untagging operations from programs written in dynamically typed languages. This paper compares dynami...
Fritz Henglein